Bridging Silicon Constraints with Modern Software Systems
Computer Science undergraduate based in Taiwan, bridging the gap between hardware foundations and modern software development. While experienced across both domains, my core expertise lies in software engineering—architecting scalable full-stack web applications, robust backends, and intuitive application builders. Currently serving as the Software Engineer for the Guang Zhao School of Cambodia (សាលារៀន ក្វាងចាវនៅកម្ពុជា), where I architect, run, and maintain the institution's core web infrastructure and digital school systems (theguangzhaoschoolofcambodia.org), transitioning from my earlier roots as a teacher at the school. Passionate about clean code, performance, and building seamless digital tools.
Optimizing software by understanding underlying circuit logic, memory constraints, and CPU/MCU execution cycles.
Building real-time image processing, matrix transformation, and feature extraction pipelines with OpenCV & Python.
From schematic analysis and physical sensor acquisition to structured databases and responsive user interfaces.
符致榮 · Phou Samnang
Computer Science & Information Engineering
📍 Taiwan · 🌐 Multilingual
Hardware & Circuits
Combinational logic, Op-Amps, Verilog HDL, and FPGA synthesis in Intel Quartus.
Vision & Algorithms
OpenCV image filtering, contour analysis, matrix operations, and NumPy arrays.
Award-Winning Engineering
Best Value Creation Award winner at the Vocational Cup hackathon (team "有誠意的蓮霧").
Multilingual & Adaptable
Fluent in Chinese (中文), English, and Cambodian; studying and innovating in Taiwan.
Academic & Project Milestones
CSIE Degree Focus
Taiwan Higher EducationRigorous coursework across computer architecture, object-oriented design in Java/C++, discrete mathematics, data structures, and embedded microcontroller systems.
Vocational Cup Award
Best Value Creation WinnerCollaborated under team "有誠意的蓮霧" to architect and demonstrate an end-to-end campus food waste reduction prototype with real-time tracking mechanisms.
FPGA & Circuit Synthesis
Digital Logic & QuartusHands-on experience modeling gate-level behavior, state machines, and combinational decoders using Verilog HDL on FPGA development boards.
Interested in exploring the technical projects?
Check out selected software builds, computer vision models, and engineering prototypes.